1. Field of the Invention
Embodiments of the present invention relate to power semiconductor modules used in three-level inverters and resonance-type inverters.
2. Description of Related Art
FIG. 18 is the circuit diagram of a three-level inverter that converts a direct current (“DC”) to an alternating current (“AC”) using a conventional technique.
The circuit configuration shown in FIG. 18 is disclosed in Japanese Unexamined Patent Application Publication No. 2008-193779, also referred to herein as “Patent Document 1.” DC power supplies 41 and 42 are connected in series to each other. In FIG. 18, positive electrode potential P, negative electrode potential N, and neutral point potential M are described. If one wants to configure the DC power supply from an AC power supply system, it is possible to configure the DC power supply using a diode rectifier and a large-capacity electrolytic capacitor, which are not shown.
Series connection circuits of Insulated-Gate Bipolar Transistors (“IGBT's”), each including an IGBT and a diode connected in opposite parallel to the IGBT, are connected for the three phases between positive electrode potential P and negative electrode potential N. In detail, series connection circuit 60 for the U-phase includes an upper arm including IGBT 111 and diode 112 connected in opposite parallel to IGBT 111 and a lower arm including IGBT 113 and diode 114 connected in opposite parallel to IGBT 113. Series connection circuit 61 for the V-phase includes an upper arm including IGBT 121 and diode 122 connected in opposite parallel to IGBT 121 and a lower arm including IGBT 123 and diode 124 connected in opposite parallel to IGBT 123. Series connection circuit 62 for the V-phase includes an upper arm including IGBT 131 and diode 132 connected in opposite parallel to IGBT 131 and a lower arm including IGBT 133 and diode 134 connected in opposite parallel to IGBT 133.
An AC switch including an opposite series connection of IGBT's, to each of which a diode is connected in opposite parallel, is connected between the series connection point of the upper and lower arms in the series connection for each phase and neutral point potential M of the DC power supply.
In detail, IGBT module 63 includes IGBT 81 and diode 82 connected in opposite parallel to IGBT 81. IGBT module 64 includes IGBT 83 and diode 84 connected in opposite parallel to IGBT 83. An AC switch circuit, in which the emitter of IGBT module 63 and the emitter of IGBT module 64 are connected to each other, is connected between the series connection point in series connection circuit 60 for the U-phase and neutral point potential M of the DC power supply.
IGBT module 65 includes IGBT 85 and diode 86 connected in opposite parallel to IGBT 85. IGBT module 66 includes IGBT 87 and diode 88 connected in opposite parallel to IGBT 87. An AC switch circuit, in which the emitter of IGBT module 65 and the emitter of IGBT module 66 are connected to each other, is connected between the series connection point in series connection circuit 61 for the V-phase and neutral point potential M of the DC power supply.
IGBT module 67 includes IGBT 89 and diode 90 connected in opposite parallel to IGBT 89. IGBT module 68 includes IGBT 91 and diode 92 connected in opposite parallel to IGBT 91. An AC switch circuit, in which the emitter of IGBT module 67 and the emitter of IGBT module 68 are connected to each other, is connected between the series connection point in series connection circuit 62 for the W-phase and neutral point potential M of the DC power supply.
The series connection points in series connection circuits 60, 61, and 62 feed AC outputs, which are connected to load 74 via reactors 71, 72 and 73 working for filters, respectively.
In the circuit configuration shown in FIG. 18, it is possible for the series connection points in series connection circuits 60, 61, and 62 to output positive electrode potential P, negative electrode potential N, and neutral point potential M, respectively. Therefore, the circuit shown in FIG. 18 feeds three-level inverter outputs. FIG. 19 is the output voltage (Vout) waveform from the circuit shown in FIG. 18. In contrast to the two-level-type inverter, the three-level inverter shown in FIG. 18 is featured specifically by the AC voltage outputted therefrom which contains three voltage levels with a few low-order higher harmonic components. Therefore, the three-level inverter circuit shown in FIG. 18 facilitates reducing the size of output filters 71 through 73.
When the three-level inverter described above is configured by the presently available IGBT modules, a 2-in-1-type IGBT module will be employed for the series connection circuits 60 through 62 and a 1-in-1-type IGBT module for IGBT modules 63 through 68.
FIG. 20(a) describes the current paths in the three-level inverter shown in FIG. 18 made to operate with power supply 41. FIG. 20(b) describes the current paths in the three-level inverter shown in FIG. 18 made to operate with power supply 42.
In FIG. 20(a), current 151 fed from the high-potential-side of power supply 41 flows to load 74 via IGBT 111 on the upper arm. Current 151 returns to the low-potential-side of power supply 41 from load 74 via a V-terminal and intermediate devices 87 and 86. In the current path, current 151 flows from the V-terminal to intermediate devices 87 and 86 and, then, flows from intermediate devices 87 and 86 to an M-terminal.
In the regenerating operation mode, current 152 that flows from load 74 flows to the high-potential-side of power supply 41 via FWD 122 on the upper arm. Current 152 that flows into load 74 flows from the low-potential-side of power supply 41 to intermediate devices 81 and 84 and, then, flows from intermediate devices 81 and 84 into load 74 via a U-terminal. In this case, current 152 flows from the M-terminal to intermediate devices 81 and 84 and, then, flows from intermediate devices 81 and 84 to load 74 via the U-terminal.
In any case, currents 151 and 152 which flow through the intermediate devices flow through the route connected to load 74 via the V- and U-terminals.
In FIG. 20(b), current 153 fed from the high-potential-side of power supply 42 flows to load 74 through intermediate devices 81 and 84 and the U-terminal and returns from load 74 to the low-potential-side of power supply 42 via IGBT 123 on the lower arm. In this current path, current 153 flows from the M-terminal to intermediate devices 81 and 84 and, then, flows from intermediate devices 81 and 84 into load 74 via the U-terminal.
In the regenerating operation mode, current 154 that flows from load 74 flows to the high-potential-side of power supply 42 via the V-terminal and intermediate devices 87 and 86. Current 154 that flows into load 74 flows from the low-potential-side of power supply 42 via FWD 114 on the lower arm to load 74. In this case, current 154 flows from load 74 to intermediate devices 87 and 86 via the V-terminal and, then, flows from intermediate devices 87 and 86 to the M-terminal. In any case, currents 153 and 154 which flow through the intermediate devices flow through the route connected to load 74 via the V- and U-terminals.
FIG. 21 describes the current paths in the three-level inverter shown in FIG. 18 made to operate with power supplies 41 and 42.
Since any of the intermediate devices is not involved in the operations in this case, any current does not flow through the paths which connect the M-terminal and load 74 via the U-terminal, the V-terminal, or the W-terminal.
It is necessary to provide power semiconductor module 300 shown in FIG. 18 with conductors which connect power supplies 41 and 42 with IGBT modules 60, 63 and 64. In power semiconductor module 300, many conductors are used, conductors having complicated shapes are necessary, and large mutual inductance and large self-inductance are caused.
To obviate the problem described above, Patent Document 1 discloses the technique that shortens the wirings between the IGBT's as described in connection with power semiconductor module 300 to reduce the self-inductance. The technique disclosed in the Patent Document 1 integrates the series IGBT connection circuit connected to the positive and negative electrode potentials P and N and the IGBT's working as the AC switch connected between the series connection point in the series IGBT connection circuit and the neutral potential point M of the DC power supply into a monolithic IGBT module.
However, Patent Document 1 does not describe any thing on the technique for reducing the wiring inductance between the IGBT's in the module.
Although Patent Document 1 indicates the alignment of the terminals which constitute the module, Patent Document 1 does not define the alignment order of the terminals nor does it describe the reduction of the wiring inductance in the module.
In view of the foregoing, it would be desirable to obviate the problems described above. It would be also desirable to provide, with low manufacturing costs, a power semiconductor module that facilitates reducing the mutual inductance therein, reducing the electromagnetic noises introduced into the control terminals thereof, and attaching external wirings to the terminals thereof simply and easily.